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0V to 16V, Dual Hot-Swap Controller with 10-Bit
Current and Voltage Monitor and 4 LED Drivers
Table 8. dac_chx Register Format
Description:
Fast-comparator threshold DAC setting
Register Title:
Register Addresses:
dac_ch0
0x2E
dac_ch1
0x2F
R/W
DAC[7]
bit 7
R/W
DAC[6]
bit 6
R/W
DAC[5]
bit 5
R/W
DAC[4]
bit 4
R/W
DAC[3]
bit 3
R/W
DAC[2]
bit 2
R/W
DAC[1]
bit 1
R/W
DAC[0]
bit 0
RESET
VALUE
0xBF
Digital Current Monitoring
The two current-sense signals are sampled by the inter-
nal 10-bit 10ksps ADC, and the most recent results are
stored in registers for retrieval through the I 2 C interface.
The current conversion values are 10 bits wide, with the
eight high-order bits written to one 8-bit register and the
two low-order bits written to the next higher 8-bit register
address (Tables 9 and 10). This allows use of just the
high-order byte in applications where 10-bit precision is
not required. This split 8-bit/2-bit storage scheme is used
throughout the MAX5970 for all 10-bit ADC conversion
results and 10-bit digital comparator thresholds.
Table 9. ADC Current Conversion Results Register Format (High-Order Bits)
Description:
Most recent current conversion result, high-order bits [9:2]
Register Title:
Register Addresses:
adc_ch0_cs_msb
0x00
adc_ch1_cs_msb
0x04
R
inew_9
bit 7
R
inew_8
bit 6
R
inew_7
bit 5
R
inew_6
bit 4
R
inew_5
bit 3
R
inew_4
bit 2
R
inew_3
bit 1
R
inew_2
bit 0
RESET
VALUE
0x00
Table 10. ADC Current Conversion Results Register Format (Low-Order Bits)
Description:
Most recent current conversion result, low-order bits [0:1]
Register Title:
Register Addresses:
adc_ch0_cs_ lsb
0x01
adc_ch1_cs_lsb
0x05
R
R
R
R
R
R
R
R
RESET
VALUE
inew_1
inew_0
0x00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
20
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